The Defense Group at Leidos currently has an opening for a Firmware Engineer with an active DoD SECRET clearance to join our team. This position will support the CECOM Software Engineering Center contract performing Post Production Software Sustainment for the Terrestrial Sensors Software Branch.
This position will report to the Leidos Technical Lead at the Software Engineering Environment located in APG, MD. A successful candidate will have demonstrated experience developing, modifying, and optimizing FPGA firmware code; developing, reviewing, and revising hardware, firmware, and circuit designs; creating and executing tests; and generating documentation detailing direct system operation.
Primary Responsibilities:
Responsible for modifying FPGA designs to correct firmware issues using Vivado, Quartus and QuestaSim for FPGA design and simulation
Perform VHDL coding to optimize existing firmware code to reduce the FPGA resources used by the exiting algorithms
Possess the ability and understanding to develop and review designs for circuit cards assemblies, test hardware, and other system documentation
Design unit, integration, and system level tests to verify the performance, specifications, and compliance of VHDL products and FPGA implementation
Possess the ability to troubleshoot hardware and solder electrical circuits
Basic Qualifications:
Bachelor’s Degree from an accredited college in Electronics Engineering or any other Scientific or Technical discipline plus an additional 12+ years of demonstrated experience in firmware engineering. No substitution of experience for a degree is allowed.
US Citizen: Must possess and maintain a current DoD Secret security clearance.
Ability to understand and modify VHDL code in existing Altera & XILINX FPGAs using Altera Quartus, Xilinx Vivado and Mentor Graphics QuestaSim for design and simulation
Prepare, maintain, and update relevant system baseline documentation, specifications, compiled firmware, test benches, verification plans, and other technical reports
Design unit, integration, and system level tests to verify the performance, specifications, and compliance of VHDL products and FPGA implementation
Have the ability to read, modify, and design electrical diagrams, circuit card designs, test hardware specifications, and other system documentation
Work at a Government systems engineering and integration lab 40 hours per week
Preferred Qualifications:
Experience working with XILINX Virtex II & IV FGPAs and Xilinx 7 Series FPGAs and SOCs and their associated design tools to include Vivado and QuestaSim for VHDL design, coding, and simulation
Experience working with Altera Stratix Series FPGAs and their associated design tools to include Quartus and QuestaSim for VHDL design, coding, and simulation
Ability to design, modify, and troubleshoot system and test hardware circuitry
Ability to design and document mechanical drawings of test hardware.
Ability to solder electrical components
Knowledge of infrared camera technology (focal plane arrays, cryocoolers)
Understanding of US military biometrics, sensors and surveillance systems or other US Military Experience
Knowledge of Git based tools, such as GitLab or Atlassian BitBucket.
Excellent oral and written communications skills.
Ability to work independently and/or in a team environment.
Pay Range $118,300.00 – $182,000.00 – $245,700.00
The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.
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